1. Field of the Invention
This invention relates in general to signal processing, and more particularly to an integrator circuit that achieves offset reduction while inducing integrator leakage.
2. Description of Related Art
Today's wireless communications markets are being driven by a multitude of user benefits. Products such as cellular phones, cordless phones, pagers, and the like have freed corporate and individual users from their desks and homes and are driving the demand for additional equipment and systems to increase their utility. As a result digital radio personal communications devices will play an increasingly important role in the overall communications infrastructure in the next decade.
Mixed-signal integration and power management have taken on added importance now that analog and mixed analog-digital ICs have become the fastest-growing segment of the semiconductor industry. Integration strategies for multimedia consoles, cellular telephones and battery-powered portables are being developed, as well as applications for less integrated but highly specialized building blocks that serve multiple markets. These building blocks include data converters, comparators, demodulators, filters, amplifiers, and integrators.
One important aspect of digital radio personal communications devices is the integration of Radio Frequency (RF) sections of transceivers. Compared to other types of integrated circuits, the level of integration in the RF sections of transceivers is still relatively low. Considerations of power dissipation, low offset budgets, form factor, and cost dictate that the RF/IF portions of these devices evolve to higher levels of integration than at present. Nevertheless, there are some essential barriers to realizing these higher levels of integration.
For example, most applications provide an integrator circuit in a RF receiver system to produce a ramping of an output voltage which is linearly increasing or decreasing. For integrator circuits, low frequency amplifier noises and direct current (DC) offsets are attenuated.
A modification to a typical integrator circuit is necessary to make offset reduction practical. Generally, a capacitor used in an integrator circuit is open to DC signals. As a result, there is no negative feedback, i.e. integrator leakage, at zero frequency. Without a negative feedback, an integrator circuit interprets a DC offset voltage as a valid input voltage. The result is that the capacitor is charged, and the output voltage goes into positive or negative saturation where the output voltage stays indefinitely.
One way of reducing the effect of a DC offset in an input voltage, i.e. inducing integrator leakage, is to place a switched-capacitor in parallel to an integration capacitor, thereby removing some charge every clock cycle. However, this method would often affect the offset cancellation performance. Further, adding a switched-capacitor on chip would increase the size of a chip which is often prohibitive. Off chip switched-capacitor would increase between eight and sixteen extra pins depending on whether one or two sections of AC coupling are needed. In addition, AC coupling would have high enough corner frequency to cause settling at the beginning of a burst which produces too much DC wander for a baseband signal. As a result, a dual bandwidth AC coupling mechanism would have to be utilized.
It can be seen that there is a need for integrator leakage without placing a switched-capacitor in parallel to an integration capacitor.
It can also be seen that there is a need for an offset cancelled integrator that achieves offset reduction while also inducing integrator leak.